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Cypress Semiconductor /psoc63 /PASS /INTR_CAUSE

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Interpret as INTR_CAUSE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CTB0_INT)CTB0_INT 0 (CTB1_INT)CTB1_INT 0 (CTB2_INT)CTB2_INT 0 (CTB3_INT)CTB3_INT 0 (CTDAC0_INT)CTDAC0_INT 0 (CTDAC1_INT)CTDAC1_INT 0 (CTDAC2_INT)CTDAC2_INT 0 (CTDAC3_INT)CTDAC3_INT

Description

Interrupt cause register

Fields

CTB0_INT

CTB0 interrupt pending
CTB1_INT

CTB1 interrupt pending
CTB2_INT

CTB2 interrupt pending
CTB3_INT

CTB3 interrupt pending
CTDAC0_INT

CTDAC0 interrupt pending
CTDAC1_INT

CTDAC1 interrupt pending
CTDAC2_INT

CTDAC2 interrupt pending
CTDAC3_INT

CTDAC3 interrupt pending

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data